This is a new member of the Versatile ™ Express CoreTile family and is the first ARM big.LITTLE hardware from ARM, featuring dual ARM Cortex™-A15 and tri Cortex-A7, 2GB of DDR2, debug and embedded trace support, and the option to prototype with one of our Versatile Express LogicTiles.
The V2P-CA15x2_A7x3 enables:
- Exploration of the big.LITTLE architecture
- Boot code, hypervisor, cluster-switching, device driver and application software development
- Software debug and development of software tools through the on-chip CoreSight™ debug and trace infrastructure
When connected to a Versatile Express motherboard, the CoreTile forms the basis of an early access software development platform. Developers can use the system for porting OS kernel or driver code to the big.LITTLE architecture, based on the Cortex-A15 and Cortex-A7 processors.
The system can be expanded by adding a LogicTile Express board to the second tile site on the motherboard, which adds a large FPGA for prototyping custom logic blocks alongside the ARM processor. The exported AXI interface from the CoreTile has dedicated routing, directly linking the Test Chip and FPGA. This ensures maximum bandwidth is available for the user AXI subsystem.
A microcontroller-based configuration mechanism provides an easy, USB-based plug-and-play method for programming software, firmware and FPGA images into the system flash memory from an attached PC. Further information is available here.
You can check out linaro.org/downloads for available kernel and file system support. I find this board to be very interesting because it allows you to explore big.LITTLE, power management and kernel switching. Here’s a video of big.LITTLE running on Versatile Express
An application note is available which discusses the operation of the power management features for this CoreTile Express. It covers the power management hardware features provided by the board and software model for interfacing to this hardware. On reading this application note, the user should be in a position to develop and debug power management software running on the V2P-CA15_A7 CoreTile, which will include Dynamic Voltage and Frequency Scaling (DVFS) and Power Switching. Both methods are required to support a big.LITTLE power management model. The application note is available HERE.
Liam Dillon, Engineering/Product Manager, ARM System Design Division. Liam joined ARM in April 2002 working on SoC validation, followed by FPGA synthesis and design of ARM based development boards. Today he is the Engineering and Product manager focused on the roadmap for ARM development boards. Prior to ARM, Liam was a product test engineer at Intel, working on PentiumII test and manufacturing for 3 years, leading him to specialize in SoC design and validation for Parthus-CEVA for an additional 3 years. Graduating from Cork Institute of Technology with a BEng in Electronics, Liam has over 18 years experience of realizing new technologies in the engineering industry.
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