It happened when I was giving a recent talk to a large group of ARM engineers and technical fellows at our internal global engineering conference. The subject of my talk was an inside look at the much talked about ARM vs X86 battle. I naturally highlighted many of the power differences between two very different approaches to processor design including the fact that the ARM architecture was designed from the start for mobile.
After my talk I was approached by one of the most famous (internal to ARM) original architects of the ARM instruction set. As a marketer at an engineering conference, it was an honor to finally meet him in person and I was surprised that he took the time to talk to me. He complimented me on my talk but then very gently pointed out that I had a bit of the ARM history wrong – ugh!
You see, the original ARM instruction set was designed for a low-cost computing system targeted to the UK market. The device ironically was not so dissimilar to the low-cost netbooks we talk about today. The constraints given to original ARM design team was cost, cost, and cost! As this architect explained they had to worry about every little transistor to keep the chip cost very low.
Aha! The ARM architecture was designed to fit in the smallest possible footprint and the side benefit is an architecture naturally tuned to low power and mobile products.
I had forgotten my physics training – find the underlying elegance in simplicity.
This Aha moment couldn’t have been more timely. I have been struggling with the fact that in all of the media discussions comparing ARM-based processors to X86 based processors – no one was focusing on the vast size differences. The sheer number of transistors required to implement the instruction set for a given performance level is vastly different.
The tech-savvy probably know that ARM is a RISC instruction set. Simply put, it is a smaller set of instructions that does not require large decoding logic or overly complicated pipeline structures to execute efficiently. Smaller decoding logic and simpler pipelines equals fewer transistors requiring less power. This is especially important when the processor is sitting idle – i.e. waiting to be called into action like in most mobile products. And on modern process technologies (45nm, 32nm, etc), leakage power (the power consumed when sitting in idle) is a killer.
One can easily see the difference when comparing chips based on ARM’s high-performance Cortex-A8 and Cortex-A9 processors to those based on Intel’s Atom processor. Typical implementations of these types of ARM chips achieve similar performance with a footprint fraction of the size of Atom. But it is ARM’s recent introduction of the Cortex-A5 processor that really drives this point home. You see the ARM Cortex-A5 implements the entire ARM instruction set supported on the high-end ARM Cortex-A9 – but the Cortex-A5 is an order of magnitude smaller and more power efficient that Intel’s Atom CPU.
You now get the full support of the ARM instruction set and software compatibility into a price and power profile that is suitable for lower feature phones – soon to be smarter phones. This is the best demonstration of the scalability of the ARM architecture and the benefits of elegant design.
So thank you to the lead architect that corrected my talk and thank you to all of those original ARM designers challenged to design small but think big.
Stay tuned for more on low power design at ARM………..
Kerry McGuire, Director of Strategic Software Alliances, ARM, Growing up in a tiny little technology town and then moving to Austin to work in the mobile industry has led to a lifetime of being a technology groupie. Fascinated by the changing technical industry and the impact of technology on society trends, she enjoys watching the industry evolve by working with the best of ARM’partners.
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