ARM Community: EDA Tech Forum: Deep dive in the Electronic Design Automation world - ARM Community

The Mentor Graphics' EDA Tech Forums at the Williams F1 Conference centre in Oxfordshire, UK provided an interesting diversity of topics I would summarize that tomorrow’s tools as well as new IP development will ensure we keep getting smarter and smarter mobile devices in our pockets without having to carry your charger!


Dr. Wally Rhines', Mentor Graphics CEO, keynote “Delivering 10X Design Improvements” made the day’s goal quite clear from the start. To achieve this tenfold increase of transistor number, we need to continuously create better methods and not only try and improve older ones. Dr. Rhines insisted that the progress made is following “The Learning Curve” and not Moore’sLaw that Gordon Moore himself revised a couple of times. At the current growth rate, Wally stated we would reach this 10X threshold in 2018 (+49% transistor/year; +13% units shipped/year) and because studies show that new tools take roughly 8 years to be widely adopted, how to tackle the 40 Billion transistor mark is being established now.

DAC 47 (Design Automation Conference) was not too long ago and Gary Smith has been quoted quite a few times as he would have shown that even if the hardware design cost stayed stable, the embedded software design cost has doubled in the last years… Hence the need of simplifying and improving tools to meet the lowering cost requirements.

What I really enjoyed about Mentor Graphics presentation was its clarity. Effortlessly we could understand why we were changing from RTL (Register Transfer Language) abstraction level to Transaction Level Modelling. Similarly we were shown test time could be cut by an order of magnitude (or test coverage increased ten times) by replacing the Constrained Random Test (CRT) methodology with Intelligent Test Bench (ITBA). I found a detailed tutorial on CRT by Doulos…

John Cornish, EVP and GM of ARM System Design Division, presented on Mobile Internet Computing in term of performance and power consumption.
Of course, we were reminded that on average, a mobile phone has >2.2 ARM based chips in them… Actually after only 20 years of existence, 25 billion ARM cores have been shipped so far! I believe the main point I’ll take away is that we ask for more and more powerful handhelds but we don’t want any sacrifice of their autonomy. This gives interesting challenges for 100 Mbps range devices working on 3.9G/4G like for LTE networks for which ARM is designing new processors…
Here are the slides I managed to get from John:  EDA_Tech_Forum_ARM_14_6_10.pdf (1009.31K)
Number of downloads: 267

This race to a low power consumption was also part of Mentor N. Elliot presentation who at several occasions made reference to the “Dark Silicon” Mike Muller (ARM CTO) explained earlier this year at “Designing with ARM“. (in a nutshell, we have more and more transistors, but have to be careful at how many we use at any time to optimize consumption).
Another investigation point I had seen in the past is to stack SDRAM on top the processor in the same package. This 3D technology, on top of reducing the chip count and board space, also saves you a lot of energy. It should cut down by a factor 10 the consumption of external communications. As an example, you can read more on EuroCloud, a European led project.

Finally, ARM Connected Community was naturally represented with Partners like Doulos, GlobalFoundries and Mentor Graphics most of them I had the pleasure to discuss with.

Did I miss something important? Let me know!

As always, your comments are warmly welcome…
Kindly, Alban.

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