ARM Community: ARM @ 47DAC: IP Collaboration, MCUs, Software Tools, Memory BIST and Zydeco - ARM Community

My 47DAC blog review yesterday about Electronic Design Automation (EDA) activities (ARM everywhere, EDA, Cloud Computing & Computex) ended suggesting that it looked like it was going to be another good week for ARM and the ARM Connected Community – and today did not disappoint.

Here are a few of the highlights:

• Dr. John Heinlein’s Keynote - Collaboration with foundries and EDA
• Predictions of ARM’s growth in new markets (microcontroller (MCU))
• A declaration about ARM as a leader in software tools
• Technology announcements about a standard port for MemoryBIST and
• My favorite -Live Zydeco music

Now that’s a full day with ARM everywhere. Read on to get the inside scoop…..

John Heinlein IP Kenote – Mobile technology, Collaboration, and 32/28nm

My day started outside of the convention center (via the scooter I was riding – the only way to get through DAC) when I was greeted by the ChipEstimate team promoting their IP Talks with a keynote by none other than Dr. John Heinlein of ARM. (Note to self, a great way to promote DAC activities – start outside the convention center.)

Unfortunately I could not attend John’s keynote and if you were in the same boat then you can catch the video when you return from DAC here.

I did manage to catch up with John for a few comments and read a few highlights from the twittersphere via @RichardGoering.

Highlights from John Heinlein:

• Mobile technology is the main market driver: 3G+ users are slated to double in 2 years, nearly triple in 4 (hum very similar to some of the drivers for 3D silicon packaging that Mary Olsson mentioned in her Sunday talk that I reviewed yesterday)
• SoC design costs and complexity are growing making it difficult for all but largest companies to do everything in-house
• ARM is collaborating with foundries and EDA to reduce risk, cost and improve time-to-market
• ARM announced 32nm production IP platform available for Common Platform 32nm process, 28nm slated for late 2010

Plus some great perspective from @RichardGoering:

• @RichardGoering: Heinlein , #ARM: Hi-K metal gates ease power problems, make scaling practical again. #47DAC #EDA #semiP
• @RichardGoering: #ARM keynote at IP Talks at #CDNS ChipEstimate.com #47DAC: Optimism at 32/28 nm w/ power, design rules, memory. Scaling can still work! #EDA

Special thanks to Richard Goering and social media on keeping me up to speed on the day’s events. I’m looking forward to watching the video for my own interpretation.

Gary Smith on EDA – This could have been titled where Zydeco and EDA Meet

My first event was Gary Smith on EDA: Trends and What’s Hot at DAC. (Disclaimer, Gary is my spouse.) The large crowds were the same as in previous years; however, there was a whole new beginning to the panel that must be seen (youtube video to follow) to be appreciated as Gary (washboard), Bob Gardner (saxophone), Mike Santarini (guitar) and Peggy Aycinena (accordion) did a live rendition of the Zydeco song, Uncle Bud to start the panel. I’m happy to report that while the song was enjoyed by all Sanjay Srivastava (Denali CEO) felt joy or sorrow or empathy or pity – at least enough to give a tip J. In the end, the team of EDA Chief Analyst, Executive Director of EDAC, Editor of Xilinx’s Xcell journal and Editor of EDA Confidential all plan to keep their day jobs (my bank account is happy too because the prospects of regular gigs didn’t look good.) It was certainly the most entertaining start to DAC that I’ve seen.

The regular presentations began and Gary covered his What To See at DAC 2010 list and why the companies who were listed were chosen for the list. It was followed by a repeat of Sunday’s Don’t Panic: SoC Design Costs Will Come Down.

The Q&A brought up two ARM community discussions where Gary stated:

”I expect ARM to be taking over that [microcontroller (MCU)] market”

And my other favorite comment….

“ARM, IBM and Intel are the leaders in Software tools”

All and all the event was great fun.

Cadence and ARM: CoreLink + CoreSight = easier software development

The software tools comment from Gary Smith was the perfect introduction to my next session (with more than 30 people in attendance) by ARM’s Barry Spotts that I attended at Cadence’s booth #1334. The session was an overview of ARM’s CoreLink & CoreSight tools portfolio which complement our processors highlighting our collaboration with Cadence tools. The CoreSight debug tools enable the software community, the end users, to debug system level software applications easily. The CoreSight hardware in an ARM processor silicon environment enable on-chip debug. Both capabilities that Gary Smith referenced as necessary to be leaders in this tool space. We’ll update this blog with the soon to be released ChipEstimate video showing early PPA (power, performance and area) estimation showing NIC-301 using ChipEstimator tool. If you missed the session, Barry is repeating on Wednesday at 2 pm.

ARM and Mentor: Memory BIST gets standardized

Having a full morning of music and technology, I headed upstairs to the Mentor and ARM Memory BIST your ARM Core for Optimum Performance luncheon with Rob Aitken of ARM and Stephen Pateras of Mentor. Rob and Stephen each had some key points:

ARM

• ARM is offering standardized Memory BIST port on all processors starting with the Cortex-A5
• This port allows zero performance overhead testing of processor memory
• The port is supported by ARM’s physical IP memory compilers and Mentor’s Tessent MemoryBIST

Rob highlighted that in order to ensure high quality in your hardware silicon, the memory needed to be tested for bugs, or verified, as memory is more susceptible to defects than other logic. In fact, the path from memory to logic and back to memory is one of the most critical paths in the design. The standard port allows flexibility with the customization of redundant features and BIST algorithms.

Mentor’s Tessent Memory BIST provides:

• Comprehensive testing & diagnosis of memory
• Repair analysis & self-repair
• The Mentor tool improves memory yields and automates complete on-chip self-repair

As Rob had highlighted the need for thorough tests and an optimized memory to logic path, Mentor promoted its detailed tests that have no performance hit as the tests are not in the functional path to the memory.

The close ARM and Mentor collaboration is fully interoperable and enables quick adoption by users as users who use the ARM memory compiler automatically create Tessent memory library files that talk to the Tessent tools.

Plus more from Mike Santarini, SOI and Disneyland - but this will have to wait

While I thoroughly enjoyed the interview with Mike Santarini, given the lateness of the hour, I’ll save the social media discussion and updates until tomorrow as well as comments from my coworkers on the SOI panel and Mentor’s press and customer event at Disneyland.

I will leave you with one last thought - the last event of Monday that must be noted – The Denali party. Was last night the end of the era of great EDA parties?

Lastly, let me thank everyone for the private comments today about yesterday’s blog. Please keep providing the feedback.

What’s on for Tuesday? GlobalFoundries (GF) keynote, visiting ARM Partner demos, 32/ 28nm ARM, GF, SNPS lunch and more updates from Monday. I’m predicting another full day for me.

Lori Kate Smith, Partnership Marketing Manager, ARM, has the best job at ARM because she gets to work with ARM Partners developing programs that enable broader support for the ARM architecture in her role of managing the ARM Connected Community. She’s passionate about creating communities where engineers can share information, find answers to their questions and talk about cool technologies. Prior to ARM, Lori Kate spent time in multiple different industries including EDA (Cadence, Verisity, Axis Systems), Enterprise Software and dot bomb (HelloBrain), and wireless (Metricom (Ricochet), AT&T, and MCCaw Cellular equally splitting her time between every marketing and buz dev role you can imagine and major account sales. If there’s a new technology to launch or sell, she’s game. Lori Kate even managed to get a few degrees at Santa Clara University (MBA) and Middlebury College (BA.)

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